FPGA is the abbreviation of English Field Programmable Gate Array, which is field programmable gate array. FPGA uses its field programmable features to integrate the original board-level products into chip-level products, reduce the size, shorten the system development cycle, and facilitate system upgrades. It has large capacity, strong logic function, and improved system stability. High speed and high reliability. It can be completely configured and programmed by the user in software in a digital system design to perform a specific function. To study the FLEX10K series of chips from Altera, learn the working principle and usage characteristics of the chip, and design a minimum system based on FLEX10K chip. By designing the minimum system, you can better understand the FPGA. And have a strong interest in it, to start a good start for more people who want to learn about FPGA. Reset and crystal circuit schematic design A chip, especially a programmable chip, usually requires a short period of time to initialize internal parameters at the moment of power-on. At this time, the chip cannot enter the working state immediately. It is usually said that the power-on initialization is a reset, and the circuit that performs this function is called a reset circuit. This FPGA chip uses a low level reset, supports power-on reset and manual reset, and generates a low level after RESET is pressed. Figure 4-2 Reset circuit schematic design The crystal oscillator is a component that provides a frequency reference for the circuit. It is usually divided into two major categories: an active crystal oscillator and a passive crystal oscillator. The passive crystal oscillator needs an oscillator inside the chip, and the signal voltage of the crystal oscillator is determined according to the oscillating circuit, allowing different Voltage, but passive crystal oscillators usually have poor signal quality and accuracy. They need to accurately match peripheral circuits (inductors, capacitors, resistors, etc.). If you need to replace the crystal oscillator, you must replace the peripheral circuit at the same time. The active crystal oscillator does not require the chip's internal oscillator and provides a high-precision frequency reference with better signal quality than passive crystals. This FPGA chip uses a 50 MHz active chip crystal as the clock input for the chip operation (Figure 4-3). Figure 4-3 Schematic diagram of crystal oscillator circuit Buzzer circuit schematic design The circuit is very simple. It should be noted that the high-quality buzzer is used on the development board, and the pulse is required to control its sound. The transistors in the circuit diagram are used as switches, and the transistor can enhance the drive capability when the drive capability provided by the I/O is insufficient. Active low (Figure 4-4). Figure 4-4 Buzzer circuit schematic design
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