Typical Interface Circuit of 8051 Single Chip Computer--Parallel Extended Static Display Circuit Diagram

The following figure shows the parallel extended static display circuit diagram (3-bit LED static display circuit). The subroutine is programmed as shown below, and the display number (≤255) exists in the internal RAM 30H.

The corresponding procedure is:
DIR1: MOV A, 30H; read display number

MOV B, #100; set divisor

DIV AB; produces hundreds of display numbers

MOVC A, @A+DPTR; read hundred display characters

MOV DPTR, #0DFFFH; set 74377 (hundreds) address

MOVX @DPTR, A ; output hundreds digit display

MOV A, B; read remainder

MOV B, #10; set divisor

DIV AB; produces ten digits of display

MOV DPTR, #TAB; set the first address of the common yang field code table

MOVC A, @A+DPTR; read ten digit display

MOV DPTR, #0BFFFH; set 74377 (ten place) address

MOVX @DPTR, A ; output ten digit display

MOV A, B; read one digit to display the number

MOV DPTR, #TAB; set the first address of the common yang field code table

MOVC A, @A+DPTR ; read one digit display

MOV DPTR, #7FFFH; set 74377 (ones) address

MOVX @DPTR, A ; output one digit display

RET ;

TAB: DB 0C0H, 0F9H, 0A4H, 0B0H, 99H; common yang field code table

DB 92H, 82H, 0F8H, 80H, 90H;